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Minisymposium Presentation

Panel Discussion: Sensitive Data in HPC – How Secure Can It Be?

Monday, June 3, 2024
16:00
-
16:30
CEST
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Presenter

Timothy
Dykes
-
HPE

Tim is a Research Engineer in the HPE HPC/AI EMEA Research Lab, where he collaborates with EMEA scientific and technical communities on a variety of supercomputing research and development projects. He holds a Ph.D. in high performance scientific visualisation from the University of Portsmouth, U.K., and his primary research interests focus on computer architecture, performance portability, programming models for heterogeneous high performance computing, and scientific visualisation.

Description

In this roundtable, the speakers of the Minisymposium and additional guests will discuss with the audience the question “How secure can handling sensitive data in HPC be?”, with an introduction given by Martin Matthiesen (CSC – IT Center for Science, Finland), moderated by Tiziano Müller (HPE, Switzerland). This includes the following topics: Enabling collaboration in HPC through Confidential Computing: How does Confidential Computing allow researchers from different institutions to securely work on sensitive data in a shared HPC environment, exploring solutions for data privacy while facilitating collaboration. Mitigating security risks in cloud-based HPC with Confidential Computing: Discussing how Confidential Computing helps address security concerns when using public cloud resources for HPC. Desirable and achievable levels of confidentiality with today’s technology will be evaluated. Standardization and interoperability of Confidential Computing for HPC: This topic explores the ongoing efforts to create standards and ensure compatibility between different TEE implementations for seamless use in HPC environments.The future of Confidential Computing in HPC: This dives into potential future advancements in Confidential Computing technologies and their impact on HPC. It could explore areas like integration with AI workloads or leveraging Confidential Computing for emerging HPC architectures.

Authors