Minisymposium Presentation

The first step in the particle physics simulation chain involves the evaluation of exact, analytic scattering amplitudes in a process called hard event generation. Although these amplitudes are given by explicit mathematical expressions, their complexity alongside the sheer magnitude of necessary evaluations make them a noteworthy bottleneck for LHC computing purposes; and unlike other simulation bottlenecks, which often involve a significantly branching control flow, scattering amplitude evaluations are computed identically across many different phase space points. As such, hard event generation is a well-suited task for data-level parallelism. In the last few years, a working group of data scientists and physicists across Europe and the US have worked on porting leading order (LO) hard event generation within the particle physics framework MadGraph5_aMC@NLO (MG5aMC) to SIMD/SIMT architectures, such as vector CPUs and GPUs, and recently work has been started on additionally parallelising next-to-leading order (NLO) corrections to these amplitudes. This involves significant restructuring and rewriting of legacy code, but has proven fruitful. Preliminary tests for LO event generation often show maximal theoretical speedup found when compared to native MG5aMC, and there is ongoing work to integrate this software into the LHC experiments’ simulation chains.